David Atienza Alonso is Professor and Director of the Embedded Systems Laboratory (ESL) at the Institute of Electrical Engineering within the School of Engineering (STI) of EPFL, Switzerland. He also holds the position of Adjunct Professor at the Computer Architecture and Automation Department of Complutense University of Madrid (UCM), Spain. He received his M.Sc. and Ph.D. degrees in Computer Science from Complutense University, Madrid, Spain, and Inter-University Micro-Electronics Center (IMEC), Leuven, Belgium, in 2001 and 2005, respectively. His research interests focus on system-level thermal- and energy-aware design methodologies for multi-core computing systems and high-performance embedded systems, including new modelling and control frameworks to develop dynamic thermal management techniques for Multi-Processor System-on-Chip, novel architectures for logic and memories in forthcoming nano-scale electronics, dynamic memory management and memory hierarchy optimizations for embedded systems, Networks-on-Chip interconnection design and wireless body sensor networks design. In these fields, he is co-author of more than 180 publications in prestigious journals and international conferences, such as, IEEE TCAD, IEEE Micro, IEEE T-VLSI Systems, ACM TODAES, Elsevier-Integration: The VLSI Journal, DAC, ICCAD, DATE, ASP-DAC, etc. He received as co-author the "2009 Best Technical Paper Award" at the 17th IEEE/IFIP Very Large Scale Integration Conference (VLSI-SoC)" and nominations for the "2004 IEEE/ACM Design Automation Conference (DAC) - Best Paper Award" and "2006 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - Best Paper Award" and "2010 IEEE/ACM International Conference on High Performance Computing & Simulation (HPCS) - Best Student Paper Award". He is the recipient of the 2012 ACM SIGDA Outstanding New Faculty Award (ONFA), and also received in 2011 an External Research Faculty Award of Oracle in the area of stable global thermal-aware control for enterprise computer servers. He is an Associate Editor of IEEE Transactions on CAD (in the area of System-Level Design) and Elsevier Integration: The VLSI Journal, and member of the Technical Program Committee of the DATE, DAC, ASP-DAC, ICCAD, GLSVLSI, ISVLSI, VLSI-SoC, RTAS, SBCCI and PATMOS conferences among others. He has been General Chair of the GLSVLSI 2011 and the VLSI-SoC 2010 conferences. He is an elected member of the Executive Committee of the IEEE Council of Electronic Design Automation (CEDA) since 2008, and member of the Board of Governors of the IEEE Circuits and Systems Society (CASS) since 2010.






